54 lines
2.3 KiB
Plaintext
54 lines
2.3 KiB
Plaintext
[/
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Copyright Oliver Kowalke 2017.
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Distributed under the Boost Software License, Version 1.0.
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(See accompanying file LICENSE_1_0.txt or copy at
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http://www.boost.org/LICENSE_1_0.txt
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]
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[#speculation]
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[section:speculation Specualtive execution]
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[heading Hardware transactional memory]
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With help of hardware transactional memory multiple logical processors
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execute a critical region speculatively, e.g. without explicit
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synchronization.[br]
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If the transactional execution completes successfully, then all memory
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operations performed within the transactional region are commited without any
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inter-thread serialization.[br]
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When the optimistic execution fails, the processor aborts the transaction and
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discards all performed modifications.[br]
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In non-transactional code a single lock serializes the access to a critical
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region. With a transactional memory, multiple logical processor start a
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transaction and update the memory (the data) inside the ciritical region.
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Unless some logical processors try to update the same data, the transactions
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would always succeed.
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[heading Intel Transactional Synchronisation Extensions (TSX)]
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TSX is Intel's implementation of hardware transactional memory in modern Intel
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processors[footnote intel.com: [@https://software.intel.com/en-us/node/695149
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Intel Transactional Synchronization Extensions]].[br]
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In TSX the hardware keeps track of which cachelines have been read from and
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which have been written to in a transaction. The cache-line size (64-byte) and
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the n-way set associative cache determine the maximum size of memory in a
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transaction. For instance if a transaction modifies 9 cache-lines at a
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processor with a 8-way set associative cache, the transaction will always be
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aborted.
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[note TXS is enabled if property `htm=tsx` is specified at b2 command-line and
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`BOOST_USE_TSX` is applied to the compiler.]
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[note A TSX-transaction will be aborted if the floating point state is modified
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inside a critical region. As a consequence floating point operations, e.g.
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store/load of floating point related registers during a fiber (context) switch
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are disabled.]
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[important TSX can not be used together with MSVC at this time!]
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Boost.Fiber uses TSX-enabled spinlocks to protect critical regions (see section
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[link tuning Tuning]).
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[endsect]
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